In the x86 architecture, the CPUID instruction (identified by a CPUID opcode) is a processor supplementary instruction (its name derived from "CPU Identification") allowing software to discover details of the processor. It was introduced by Intel in 1993 with the launch of the Pentium and late 486 processors.
A program can use the CPUID to determine processor type and whether features such as MMX/SSE are implemented.
History Prior to the general availability of the CPUID instruction, programmers would write esoteric machine code which exploited minor differences in CPU behavior in order to determine the processor make and model.B-CoolWare, TMi0SDGL x86 CPU/FPU detection library with source code, v2.15, June 2000 - see /SOURCE/REALCODE.ASM for a large collection of pre-CPUID x86 CPU detection routines. Archived on 14 Mar 2023. With the introduction of the 80386 processor, EDX on reset indicated the revision but this was only readable after reset and there was no standard way for applications to read the value.
Outside the x86 family, developers are mostly still required to use esoteric processes (involving instruction timing or CPU fault triggers) to determine the variations in CPU design that are present.
For example, in the Motorola 68000 series — which never had a CPUID instruction of any kind — certain specific instructions required elevated privileges. These could be used to tell various CPU family members apart. In the Motorola 68010 the instruction MOVE from SR became privileged. Because the 68000 offered an unprivileged MOVE from SR the two different CPUs could be told apart by a CPU error condition being triggered.
While the CPUID instruction is specific to the x86 architecture, other architectures (like ARM) often provide on-chip registers which can be read in prescribed ways to obtain the same sorts of information provided by the x86 CPUID instruction.
Calling CPUID The CPUID opcode is 0F A2. Processor support for the instruction can be detected by successfully toggling the ID flag (bit 21) in the EFLAGS register.
In assembly language, the CPUID instruction takes no parameters as CPUID implicitly uses the EAX register to determine the main category of information returned. In Intel's more recent terminology, this is called the CPUID leaf. CPUID should be called with EAX = 0 first, as this will store in the EAX register the highest EAX calling parameter (leaf) that the CPU implements.
To obtain extended function information CPUID should be called with the most significant bit of EAX set. To determine the highest extended function calling parameter, call CPUID with EAX = 80000000h.
CPUID leaves greater than 3 but less than 80000000 are accessible only when the model-specific registers have IA32_MISC_ENABLE.BOOT_NT4 [bit 22] = 0 (which is so by default). As the name suggests, Windows NT 4.0 until SP6 did not boot properly unless this bit was set, but later versions of Windows do not need it, so basic leaves greater than 4 can be assumed visible on current Windows systems. , basic valid leaves go up to 23h, but the information returned by some leaves are not disclosed in the publicly available documentation, i.e. they are "reserved".
Some of the more recently added leaves also have sub-leaves, which are selected via the ECX register before calling CPUID.
EAX=0: Highest Function Parameter and Manufacturer ID
This returns the CPU's manufacturer ID stringa twelve-character ASCII string stored in EBX, EDX, ECX (in that order). The highest basic calling parameter (the largest value that EAX can be set to before calling CPUID) is returned in EAX.
Here is a list of processors and the highest function implemented.
+ Highest Function Parameter Processors Basic Extended Earlier Intel 486 CPUID Not Implemented Later Intel 486 and Pentium 0x01 Not Implemented Pentium Pro, Pentium II and Celeron 0x02 Not Implemented Pentium III 0x03 Not Implemented Pentium 4 0x02 0x8000 0004 Xeon 0x02 0x8000 0004 Pentium M 0x02 0x8000 0004 Pentium 4 with Hyper-Threading 0x05 0x8000 0008 Pentium D (8xx) 0x05 0x8000 0008 Pentium D (9xx) 0x06 0x8000 0008 Core Duo 0x0A 0x8000 0008 Core 2 Duo 0x0A 0x8000 0008 Xeon 3000, 5100, 5200, 5300, 5400 (5000 series) 0x0A 0x8000 0008 Core 2 Duo 8000 series 0x0D 0x8000 0008 Xeon 5200, 5400 series 0x0A 0x8000 0008 Atom 0x0A 0x8000 0008 Nehalem-based processors 0x0B 0x8000 0008Ivy Bridge-based processors0x0D0x8000 0008Skylake-based processors (proc base & max freq; Bus ref. freq)0x160x8000 0008System-On-Chip Vendor Attribute Enumeration Main Leaf0x170x8000 0008Meteor Lake-based processors0x230x8000 0008
The following are ID strings used by actual processors, listed in order of their introduction: "GenuineIntel"Intel "UMC UMC UMC "UMC "AuthenticAMD"AMD "CyrixInstead"Cyrix – also licensed by STMicroelectronics and IBM "NexGenDriven"NexGen "CentaurHauls"Centaur – owned by IDT, then VIA, then Zhaoxin "RiseRiseRise"Rise "SiS SiS SiS "SiS (ex-Rise) "GenuineTMx86"Transmeta – used in standard CPUID leaf 0000_0000h, for Intel compatibility "TransmetaCPU"Transmeta – used in extended CPUID leaf 8000_0000h and leaf 8086_0000h "Geode by NSC"National Semiconductor – acquired by AMD "Vortex86 SoC"DM&P Vortex86 (ex-SiS) "GenuineRDC"RDC Semiconductor Co. Ltd. (ex-SiS) "HygonGenuine"Hygon (AMD Zen lineage) "Shanghai"Zhaoxin (Centaur Isaiah lineage) "GenuineIotel"Intel – rare – likely caused by a 1-bit error – one full report + a few partial reports The following are ID strings that are most likely bogus: "VIA VIA VIA "sometimes cited, but no VIA processor with this string has ever been observed "AMDisbetter!"sometimes cited, but no AMD processor with this string has ever been observed "AMD ISBETTER"often cited,Grzegorz Mazur, Identification of x86 CPUs with CPUID support, 5 May 1997. Archived from the original on 24 May 1997.Ingo Böttcher, CPUDET.PAS v1.61, 23 Oct 1996 - CPU identification program that tests for "AMD ISBETTER" string. Archived on 26 Apr 2024. but no AMD K5 processor with this string has ever been observed; in particular, even the first K5 processor with Family/Model/Stepping 500h shipped with "AuthenticAMD"
The following are ID strings used by open source soft CPU cores: "GenuineAO486"ao486 CPU (old) "MiSTer AO486"ao486 CPU (new) "GenuineIntel"v586 core (this is identical to the Intel ID string)
The following are ID strings used by virtual machines: (a variety of strings)MCST Elbrus e2k processor when running dynamic binary translation softwaresmxi, Inxi issue 197: Elbrus CPU support data and implementation. Retrieved 23 October 2023. Archived on 23 October 2023. "E2K MACHINE " – the strings are inconsistent – some (but not all) encode the motherboard type "E8C-SWTX" – it is unknown whether the DBT SW pads with trailing spaces or trailing \0 chars "EL2S4" "Elbrus-MCST " "MBE1C-PC" "MBE8C-PC v.2" "MONOCUB" "ConnectixCPU"Connectix Virtual PC (version 6 and lower)Peter Ferrie, Attacks on More Virtual Machine Emulators, page 5. Archived on 15 Feb 2010.Amit Singh, Miscellaneous, see Solaris section. Archived from the original on 10 Dec 2004. "Virtual CPU "Microsoft Virtual PC 7; Microsoft x86-to-ARM (32-bit x86)Darek Mihocka, ARM64 Boot Camp: Understanding x86/x64 Emulation on Windows on ARM, 28 Jan 2024, see "Probing CPUID" section. Archived on 24 Feb 2024. "AuthenticAMD"Microsoft x86-to-ARM (64-bit x86) "GenuineIntel"Apple Rosetta 2 "Insignia 586"Insignia RealPCInsignia Solutions, RealPC Installation and User’s Guide, 1997, p. 71. Archived from the original on 28 Nov 2015.Philippe Geneste, (INFO) Emulation PC sur Mac (in French), 21 Jan 1998. Archived on 24 Jun 2025. and SoftWindows 98Insignia Solutions, SoftWindows 98 Installation and User's Guide, 1998, p. 127. Archived from the original on 25 Nov 2015. "Compaq FX!32"Compaq FX!32 (x86 emulator for DEC Alpha processors)VOGONS discussion thread "SIV support for 386/486/586 class + Alpha CPUs and 3dfx + S3 + SiS + Matrox + XGI + old ATI + NVidia GPUs - Testing Help", post by lolo799 on 2021-09-12 17:10 — see SIV32L attachments for a screenshot and a CPUID dump listing the string. Archived on 19 May 2024. "Neko Project"Neko Project II (PC-98 emulator) (used when the CPU to emulate is set to "Neko Processor II")Neko Project 21/W, help/configure (in Japanese). Archived on 22 Sep 2024.CPU-World, CPUID for emulated Neko Project CPU with "Neko Project" string. Archived on 16 Nov 2025.
For instance, on a GenuineIntel processor, values returned in EBX is 0x756e6547, EDX is 0x49656e69 and ECX is 0x6c65746e. The following example code displays the vendor ID string as well as the highest calling parameter that the CPU implements.
.intel_syntax noprefix .text .m0: .string "CPUID: %x\n" .m1: .string "Largest basic function number implemented: %i\n" .m2: .string "Vendor ID: %s\n"
.globl main
main: push r12 mov eax, 1 sub rsp, 16 cpuid lea rdi, .m0[rip] mov esi, eax call printf xor eax, eax cpuid lea rdi, .m1[rip] mov esi, eax mov r12d, edx mov ebp, ecx call printf mov 3[rsp], ebx lea rsi, 3[rsp] lea rdi, .m2[rip] mov 7[rsp], r12d mov 11[rsp], ebp call printf add rsp, 16 pop r12 ret
.section .note.GNU-stack,"",@progbits
On some processors, it is possible to modify the Manufacturer ID string reported by CPUID.(EAX=0) by writing a new ID string to particular MSRs (Model-specific registers) using the WRMSR instruction. This has been used on non-Intel processors to enable features and optimizations that have been disabled in software for CPUs that don't return the GenuineIntel ID string.iXBT Labs, VIA Nano CPUID Tricks, Aug 26, 2010. Archived on Aug 29, 2010. Processors that are known to possess such MSRs include:
+ Processors with Manufacturer ID MSRs Processor MSRs IDT WinChip 108h-109hIDT, WinChip 2A data sheet, v1.0, Jan 1999, page A-3. VIA C3, C7 1108h-1109hVIA, C3 Nehemiah Datasheet, rev 1.13, Sep 29, 2004, page A-3. VIA Nano 1206h-1207hAgner Fog, CpuIDFake, v1.00, Jan 22, 2010, see "Instructions.txt". Archived on Jul 9, 2010. Transmeta Crusoe, Efficeon 80860001h-80860003hTransmeta, Crusoe BIOS Programmer's Guide, Jan 23, 2004, pages 63-65.Transmeta, Efficeon BIOS Programmers Guide, Aug 19, 2003, section 8.3, page 148. AMD Geode GX, LX 3000h-3001hAMD, Geode LX Data Book, pub.id. 33234H, Feb. 2009, page 107. Archived on Dec 3, 2023. DM&P Vortex86EX2 52444300h-52444301hDM&P, Vortex86EX2_A9133_Master_Data_Sheet_V11_BF, May 8, 2019, page 72.
EAX=1: Processor Info and Feature Bits
This returns the CPU's stepping, model, microarchitecture codename, and family information in register EAX (also called the signature of a CPU), feature flags in registers EDX and ECX, and additional feature info in register EBX.
+ CPUID EAX=1: Processor Version Information in EAX EAX 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Reserved Extended Family ID Extended Model ID Reserved Processor Type Family ID Model Stepping ID
Stepping ID is a product revision number assigned due to fixed errata or other changes. The actual processor model is derived from the Model, Extended Model ID and Family ID fields. If the Family ID field is either 6 or 15, the model is equal to the sum of the Extended Model ID field shifted left by 4 bits and the Model field. Otherwise, the model is equal to the value of the Model field. The actual processor family is derived from the Family ID and Extended Family ID fields. If the Family ID field is equal to 15, the family is equal to the sum of the Extended Family ID and the Family ID fields. Otherwise, the family is equal to the value of the Family ID field. The meaning of the Processor Type field is given in the table below.